Power supply controller with an input voltage compensation circuit

ABSTRACT

An example controller for a power supply includes a drive signal generator and a compensation circuit. The drive signal generator is to be coupled to control switching of a switch included in the power supply to regulate an output voltage of the power supply in response to a sensed output voltage such that the output voltage of the power supply is greater than an input voltage of the power supply. The compensation circuit is coupled to the drive signal generator and is also coupled to output an offset current to adjust the sensed output voltage in response to the input voltage of the power supply.

REFERENCE TO PRIOR APPLICATIONS

This application is a continuation of U.S. application Ser. No.12/550,268, filed Aug. 28, 2009. U.S. application Ser. No. 12/550,268 ishereby incorporated by reference.

TECHNICAL FIELD

The present invention relates generally to power supplies, and morespecifically to power supplies having an output voltage greater than aninput voltage.

BACKGROUND INFORMATION

When designing electronic equipment, regulatory agencies have setseveral specifications or standards which should be met. The electricaloutlet provides an ac voltage that has a waveform conforming tostandards of magnitude, frequency and harmonic content to electricalequipment. However the current drawn from the outlet is determined bythe characteristics of the electrical equipment which receives the acvoltage. Regulatory agencies set standards for particularcharacteristics of the current that may be drawn from the ac electricaloutlet. For example, a standard may set limits on the magnitudes ofspecific frequency components of the ac current. In another example, astandard may limit the rms value of the current in accordance with theamount of power which the outlet provides. One standard places limits onthe power factor correction (PFC) which should be included forelectronic devices, such as for example the InternationalElectrotechnical Commission (IEC) standard IEC 61000-2-2. Power factoris particularly important for power distribution systems. Whenelectronic equipment (such as a power supply) has less than unity powerfactor, power utilities would need to provide the electrical equipmentwith more current than electrical equipment with unity power factor. Byemploying PFC, power utilities may avoid the need for extra capacity todeliver current.

The power factor is the ratio of the average power over a cycle to theproduct of the root mean square (rms) voltage and the rms current. Thepower factor has a value between zero and one with unity power factor asthe ideal case. Generally, a PFC circuit shapes the input currentwaveform as closely to the input voltage waveform in an attempt toachieve unity power factor.

One example of electrical equipment which may utilize a PFC circuit is aswitched-mode power supply. In a typical switched mode power supply, thepower supply receives an input from an ordinary electrical outlet.Switches in the power supply are switched on and off by a controlcircuit to provide a regulated output. Since the power supply whichreceives the ac voltage determines the characteristics of the accurrent, power supplies often use active circuits at their inputs tomaintain a high power factor. Conventional power factor corrected powersupplies may be designed in two stages. The first stage is the PFCcircuit which attempts to shape the input current waveform to achieveunity power factor. The second stage is the switched-mode power supplywhich provides a regulated output.

In general, a step-up converter may be utilized as a PFC circuit. Inparticular, a boost power converter may be utilized as a PFC circuit.However, boost converters typically have a fixed output voltageregardless of the value of the voltage delivered by the power utilities,or in other words regardless of the line input voltage. Generally,different countries have different standards for the amount of acvoltage which is delivered. The ac line voltage may vary from 85 to 265V ac and typical step-up converters utilized for PFC may have an outputbetween 380-400 V dc. However, for countries with lower ac line voltagesit may be desirable for the PFC circuit to provide an output voltageless than 380-400 V dc.

BRIEF DESCRIPTION OF THE DRAWINGS

Non-limiting and non-exhaustive embodiments of the invention aredescribed with reference to the following figures, wherein likereference numerals refer to like parts throughout the various viewsunless otherwise specified.

FIG. 1 is a schematic illustrating a power supply in accordance with anembodiment of the present invention.

FIG. 2 is a schematic illustrating a controller of the power supply ofFIG. 1 in accordance with an embodiment of the present invention.

FIG. 3A is a graph illustrating an example offset current relationshipof the controller of FIG. 2 in accordance with one embodiment of thepresent invention.

FIG. 3B is a graph illustrating an example output voltage to inputvoltage relationship of the power supply with the example offset currentrelationship of FIG. 3A in accordance with one embodiment of the presentinvention.

FIG. 3C is a graph illustrating another example offset currentrelationship of the controller of FIG. 2 in accordance with oneembodiment of the present invention.

FIG. 3D is a graph illustrating a further example offset currentrelationship of the controller of FIG. 2 in accordance with oneembodiment of the present invention.

DETAILED DESCRIPTION

In the following description, numerous specific details are set forth inorder to provide a thorough understanding of the present invention. Itwill be apparent, however, to one having ordinary skill in the art thatthe specific detail need not be employed to practice the presentinvention. In other instances, well-known materials or methods have notbeen described in detail in order to avoid obscuring the presentinvention.

Reference throughout this specification to “one embodiment”, “anembodiment”, “one example” or “an example” means that a particularfeature, structure or characteristic described in connection with theembodiment or example is included in at least one embodiment of thepresent invention. Thus, appearances of the phrases “in one embodiment”,“in an embodiment”, “one example” or “an example” in various placesthroughout this specification are not necessarily all referring to thesame embodiment or example. Furthermore, the particular features,structures or characteristics may be combined in any suitablecombinations and/or subcombinations in one or more embodiments orexamples. In addition, it is appreciated that the figures providedherewith are for explanation purposes to persons ordinarily skilled inthe art and that the drawings are not necessarily drawn to scale.

In general, boost converters may be utilized as PFC circuits. However,it should be appreciated that other step-up converter topologies may beutilized with the embodiments of the present invention. In particular,step-up converter topologies which provide output voltage greater thantheir input voltage may be utilized with embodiments of the presentinvention. Step up converters, such as the boost converter,traditionally provide a fixed output voltage regardless of the value ofthe voltage delivered by the power distribution system, or in otherwords regardless of the ac input line voltage. However, some benefits,such as reduced boost inductor size and lower switching losses, may begained by utilizing a boost converter whose output voltage varies withthe input voltage of the boost converter. Or in other words, the outputvoltage of the boost converter follows the variations of the peak acinput line voltage. Such a converter is generally known as a boostfollower.

A boost follower typically includes a power switch which is controlledby a controller to switch between an on-state and an off-state. Ingeneral, a switch that is considered “on” is also known as closed andthe switch can conduct current. A switch that is “off” is also known asopen and substantially cannot conduct current. The controller mayreceive various inputs regarding the state of the boost follower, suchas information regarding the output voltage supplied by the boostfollower, the input voltage of the boost follower, or the desired ratiobetween the output voltage and the input voltage. Typical controllers ofthe boost follower typically include a separate terminal for the variousinputs mentioned above. Specifically, a typical controller includes oneterminal for feedback regarding the output voltage and another separateterminal for the desired ratio between the output voltage and the inputvoltage.

Generally, different countries have different standards for the amountof ac voltage which is delivered. The power line voltage may vary from85 to 265 V ac. As mentioned above, some benefits may be gained byutilizing a boost converter whose output voltage varies with the inputvoltage (also referred to herein as a boost follower) rather than aboost converter with a fixed output voltage. A typical boost converterutilized for PFC may have an output between 380-400 V. However, a boostconverter is more efficient when the output voltage of the boostconverter is less than or equal to double the input voltage of the boostconverter. For countries with lower power requirements, such as Japan orthe United States (with an ac input of 140 peak V ac and 160 peak V ac,respectively), it may be desirable to boost (or in other words,increase) the output voltage to less than 380-400 V dc. In one example,it may be desirable to provide an output voltage roughly two times theinput voltage. To utilize the boost follower as a PFC circuit forcountries with varying power requirements, a separate PFC circuit wouldbe designed for each country since the desired ratio between the outputvoltage and the input voltage is fixed. However, it is generallyundesirable to design a separate PFC circuit for each country withdiffering requirements. Embodiments of the present invention include aboost converter topology with an adjustable desired ratio between theoutput voltage and the input voltage, otherwise discussed herein as thestep-up ratio or the input-output conversion ratio. In addition, thecontroller of the boost converter in accordance with embodiments of thepresent invention also advantageously utilizes a single terminal to bothreceive feedback and also to set the desired ratio between the outputvoltage and the input voltage.

Referring first to FIG. 1, a schematic of a power supply 100 isillustrated including an ac input voltage V_(AC) 102, a bridge rectifier104, rectified voltage V_(RECT) 106, inductor L1 108, switch S1 110,output diode D1 112, output capacitor C1 114, output voltage V_(O) 116,a feedback circuit (i.e., resistor R1 118, node A 119, and resistor R2120), sensed output voltage V_(OSENSE) 121, input signal 122, controller124, resistor R3 126, node B 127, capacitor C2 128, input voltage sensesignal U_(INTSENSE) 130, drive signal 132, and input return 134. FIG. 1is one example of a power supply 100 with an adjustable step-up ratio.The example power supply 100 illustrated in FIG. 1 is a boost converterwith boost follower capabilities; however it should be appreciated thatother converter topologies may be utilized with the embodiments of thepresent invention.

The power supply 100 provides output voltage V_(O) 116 from anunregulated input voltage. In one embodiment, the input voltage is an acinput voltage V_(AC) 102. In another embodiment, the input voltage is arectified ac input voltage such as rectified voltage V_(RECT) 106. Asshown, bridge rectifier 104 receives an ac input voltage V_(AC) 102 andproduces a rectified voltage V_(RECT) 106. The bridge rectifier 104further couples to a boost follower, which includes an energy transferelement such as an inductor L1 108, a switch S1 110, an output diode 112coupled to the inductor L1 108, an output capacitor C1 114, andcontroller 124. The inductor L1 108 couples to the output of the bridgerectifier 104 and the output diode D1 112. One end of switch S1 110 alsocouples between the inductor L1 108 and the output diode 112, the otherend of the switch S1 110 couples to the input return 134. In oneembodiment, the switch S1 110 may be a transistor such as ametal-oxide-semiconductor field-effect transistor (MOSFET). In anotherexample, controller 124 may be implemented as a monolithic integratedcircuit or may be implemented with discrete electrical components or acombination of discrete and integrated components. Controller 124 andswitch 110 could form part of an integrated circuit that is manufacturedas either a hybrid or a monolithic integrated circuit.

Input return 134 provides the point of lowest potential, or in otherwords the point of lowest voltage with respect to the input for thepower supply 100. Output diode D1 112 further couples to the outputcapacitor C1 114 and the output of the power converter. Resistors R1 118and R2 120 form a feedback circuit and are coupled across the capacitorC1 114 and the output of the power converter. One end of resistor R1 118couples to the output diode D1 112 while the other end of resistor R1118 couples to one end of resistor R2 120. The other end of resistor R2120 then couples to input return 134. Resistors R1 118 and R2 120 coupletogether at node A 119. In the illustrated embodiment, node A 119 is anode external to controller 124. The voltage across resistor R2 120 andat node A 119 is known as the sensed output voltage V_(OSENSE) 121.

Controller 124 includes several terminals for receiving and providingvarious signals. At one terminal, controller 124 is coupled betweenresistors R1 118 and R2 120 at node A 119 and receives input signal 122.At another terminal, controller 124 is also coupled between resistor R3126 and capacitor C2 128 at node B 127 and receives input voltage sensesignal U_(INSENSE) 130. One end of resistor R3 126 couples to inductorL1 108 while the other end of resistor R3 126 couples to one end ofcapacitor C2 128. The other end of capacitor C2 128 is then coupled toinput return 134. The controller 124 further provides a drive signal 132to the switch S1 110 to control the turning on and turning off of switchS1 110.

In operation, the power supply 100 provides output voltage V_(O) 116from an unregulated input voltage such as ac input voltage V_(AC) 102.The ac input voltage V_(AC) 102 is received by the bridge rectifier andproduces the rectified voltage V_(RECT) 106. The power supply 100utilizes the energy transfer element, which includes inductor L1 108,switch S1 110, output diode D1 112, output capacitor C1 114 andcontroller 124 to produce a dc output voltage V_(O) 116 at the output ofthe power supply. Resistors R1 118 and R2 120 are coupled together as avoltage divider for the output voltage V_(O) 116. The output voltageV_(O) 116 is sensed and regulated. In some embodiments, the input signal122 is a feedback signal representing the output voltage V_(O) 116. Itshould be appreciated that the input signal 122 may be a voltage signalor a current signal. Since resistors R1 118 and R2 120 form a voltagedivider of the output voltage V_(O) 116, in some embodiments the inputsignal 122 is a divided value of the output voltage V_(O) 116 where thedivided value is based upon the ratio between resistors R1 118 and R2120. The controller 124 utilizes the divided value of the output voltageV_(O) 116 provided by the input signal 122 to regulate the outputvoltage V_(O) 116 to a desired value. In some embodiments, the inputsignal 122 is the sensed output voltage V_(OSENSE) 121 and includes thedivided value of the output voltage V_(O) 116. As will be furtherexplained, the controller 124 also utilizes the input voltage sensesignal U_(INSENSE) 130 to regulate the output voltage V_(O) 116 to adesired value.

In addition, as will be explained further, the values of resistors R1118 and R2 120 may also be utilized to set the ratio between the inputvoltage of the power supply and the output voltage V_(O) 116, otherwiseknown as the step-up ratio or the input-output conversion ratio of thepower supply 100. In some embodiments, the resistors R1 118 and R2 120may set the ratio between the peak input voltage of the power supply andthe output voltage V_(O) 116, such that the output voltage V_(O) isgreater than the peak input voltage. In other embodiments, the resistorsR1 118 and R2 120 may set the ratio between the average input voltage ofthe power supply and the output voltage V_(O) 116, such that the outputvoltage V_(O) is greater than the average input voltage. By varying thevalues of R1 118 and R2 120, the step-up ratio of the power supply 100may be adjusted. In further embodiments, the peak input voltage may bethe peak value of the rectified voltage V_(RECT) 106. Controller 124also receives the input voltage sense signal U_(INSENSE) 130representative of the input voltage of the power supply 100. In someembodiments, the input voltage provided by the input voltage sensesignal U_(INSENSE) 130 is the peak value of the rectified voltageV_(RECT) 106. In other embodiments, the input voltage provided by theinput voltage sense signal U_(INSENSE) 130 is the average value of therectified voltage V_(RECT) 106. Resistor R3 126 and capacitor C2 128 areutilized to sense the input voltage and to provide the controller withthe input voltage sense signal U_(INSENSE) 130. It should be appreciatedthat the input voltage sense signal U_(INSENSE) 130 may be a voltagesignal or a current signal.

As mentioned above, resistor R3 126 and capacitor C2 128 sense the inputvoltage and provide the controller with the input voltage sense signalU_(INSENSE) 130. In one embodiment, the input voltage sense signalU_(INSENSE) 130 is a current signal and the voltage at the terminal ofcontroller 124 which receives the input voltage sense signal U_(INSENSE)130 is fixed. In other words, the voltage at node B 127 is fixed. Assuch, the current through resistor R3 126 is proportional to therectified voltage V_(RECT) 106 and the capacitor C2 128 is used as anoise filter.

Utilizing the input voltage sense signal U_(INSENSE) 130 and the valueof resistors R1 118 and R2 120, the controller 124 determines thedesired value which to regulate the output voltage V_(O) 116. Inaddition, the controller 124 may modify the voltage of sensed outputvoltage V_(OSENSE) 121 in response to the value of the line inputvoltage provided by the input voltage sense signal U_(INSENSE) 130. Thecontroller 124 outputs the drive signal 132 to operate the switch S1 110in response to various system inputs to substantially regulate theoutput voltage V_(O) 116. With resistors R1 118 and R2 120 along withthe controller 124, the output of the power supply 100 is regulated in aclosed loop. In embodiments of the present invention, resistors R1 118and R2 120 along with controller 124 allows controller 124 to utilize asingle terminal rather than the two or more separate terminals ofconventional controllers for feedback and for setting the desiredstep-up ratio.

Referring next to FIG. 2, a schematic of controller 124 of power supply100 is illustrated including rectified voltage V_(RECT) 106, inductor L1108, switch S1 110, output diode D1 112, output capacitor C1 114, outputvoltage V_(O) 116, a feedback circuit (i.e., resistor R1 118, node A119, and resistor R2 120), input signal 122, controller 124, resistor R3126, node B 127, capacitor C2 128, input voltage sense signalU_(INSENSE) 130, drive signal 132, input return 134, a drive signalgenerator 214 (i.e., amplifier 202, reference voltage V_(REF) 204, andlogic block 210), a compensation circuit 216 (i.e., peak detector 206,current source 208 which produces offset current I_(OS)) and a node C212.

Controller 124, rectified voltage V_(RECT) 106, inductor L1 108, switchS1 110, output diode D1 112, output capacitor C1 114, output voltageV_(O) 116, resistor R1 118, resistor R2 120, input signal 122,controller 124, resistor R3 126, capacitor C2 128, input voltage sensesignal U_(INSENSE) 130, drive signal 132, and input return 134 coupleand function as discussed above with regards to FIG. 1. In addition,controller 124 further includes amplifier 202, reference voltage V_(REF)204, peak detector 206, current source 208 (which produces offsetcurrent I_(OS)), and logic block 210. Controller 124 receives inputsignal 122 and input voltage sense signal U_(INSENSE) 130 as mentionedabove. In one embodiment, the input signal 122 may provide the feedbacksignal for controller 124 to regulate the output voltage V_(O) 116 ofthe power supply 100 to a desired quantity. However, it should beappreciated that controller 124 may also regulate an output current ofthe power supply 100 or a combination of both output current and outputvoltage V_(O) 116. Amplifier 202 is coupled to the terminal ofcontroller 124 which receives the input signal 122 and to the referencevoltage V_(REF) 204. In one embodiment, the non-inverting input ofamplifier 202 is coupled at node A 119 and receives the input voltagesignal 122. The reference voltage V_(REF) 204 is coupled to theinverting input of amplifier 202. As illustrated, current source 208also couples to the amplifier 202 at node C 212. As will be discussedfurther, the offset current I_(OS) from current source 208 may modifythe input signal 122. The amplifier 202 then receives the modified inputsignal 122. However, in one embodiment, the offset current I_(OS) may besubstantially equal to zero and the modified input signal 122 is theoriginal input signal 122. The output of amplifier 202 further couplesto the logic block 210. Utilizing the output of amplifier 202 andvarious other parameters, the logic block 210 outputs the drive signal132 which operates the switch S1 110 to regulate the output voltageV_(O) 116 to the desired value.

The peak detector 206 couples to the terminal of controller 124 whichreceives the input voltage sense signal U_(INSENSE) 130. The peakdetector 206 receives the input voltage sense signal U_(INSENSE) 130then couples to current source 208 with offset current I_(OS). In oneembodiment, the value of the offset current I_(OS) is determined by theinput voltage sense signal U_(INSENSE) 130. Since the input voltagesense signal U_(INSENSE) 130 is representative of the input voltage, thevalue of the offset current I_(OS) may be determined by the inputvoltage. That is, the value of the offset current I_(OS) may change inresponse to changes in the input voltage. As mentioned above, in someembodiments, the input voltage provided by the input voltage sensesignal U_(INSENSE) 130 is the peak value of the rectified voltageV_(RECT) 106. In other embodiments, the input voltage provided by theinput voltage sense signal U_(INSENSE) 130 is the average value of therectified voltage V_(RECT) 106. In addition, the input voltage sensesignal U_(INSENSE) 130 may be a voltage signal or a current signal.Current source 208 further couples to the amplifier 202 at node C 212.In the example of FIG. 2, current source 208 couples to thenon-inverting input of the amplifier 202. The offset current I_(OS)produced by current source 208 flows from node C 212 to node A 119illustrated in FIG. 2. Node C 212 is an internal node of controller 124while node A 119 is an external node of controller 124. In general, aninternal node lies within the integrated circuit (IC) of controller 124while an external node lies outside of the IC of the controller 124. Inother words, the offset current I_(OS) produced by current source 208flows from a node internal to controller 124 to a node which is externalto controller 124. In the example shown in FIG. 2, node B 127 is anexternal node of controller 124.

Controller 124 utilizes the input signal 122, input voltage sense signalU_(INSENSE) 130 and various other parameters to produce the drive signal132 which operates switch S1 110. The drive signal 132 controls theturning on and turning off of the switch S1 110. In one example, thedrive signal 132 may be a rectangular pulse waveform with varyinglengths of logic high and logic low periods. With a logic high valuecorresponding to a closed switch and a logic low corresponding to anopen switch. When the switch S1 110 is an n-channel MOSFET, the drivesignal 132 may be analogous to the gate signal of a transistor with alogic high value corresponding to a closed switch and a logic low valuecorresponding to an open switch. In one embodiment, the switch S1 110may be included within the IC of controller 124.

The controller 124 receives the input voltage sense signal U_(INSENSE)130 at the peak detector 206. As mentioned above, the input voltagesense signal U_(INSENSE) 130 represents the input voltage of the powersupply 100. In one embodiment, the input voltage sense signalU_(INSENSE) 130 represents the rectified voltage V_(RECT) 106 of powersupply 100. Peak detector 206 determines the peak value of the inputvoltage of the power supply 100 from the input voltage sense signalU_(INSENSE) 130. However, in some embodiments the detector 206determines the average value of the input voltage of the power supply100 from the input voltage sense signal U_(INSENSE) 130. In one example,the input voltage sense signal U_(INSENSE) 130 is a current signal. Thecurrent source 208 then receives the determined peak input voltage fromthe peak detector 206. In one embodiment, the peak detector refreshesand determines the peak value of rectified voltage V_(RECT) 106 forevery half cycle of the ac input voltage V_(AC) 102. In other words, thepeak detector determines the peak value of rectified voltage V_(RECT)106 at every peak. In one embodiment, the length of the half cycle ofthe ac input voltage V_(AC) 102 is between 8 to 10 milliseconds (ms). Orin other words, the time between each peak of the rectified voltageV_(RECT) 106 is about 8 to 10 ms. In addition, the peak detector has aprogrammed refreshed period which the peak detector is forced to refreshif a peak value has not been detected. In one embodiment, the programmedrefresh period is substantially 15 ms.

As illustrated in FIGS. 3A, 3C and 3D, the current source 208 producesan offset current I_(OS) from the value of the peak input voltage of thepower supply 100 determined from the input voltage sense signalU_(INSENSE) 130. In other embodiments, the current source 208 producesan offset current I_(OS) from the value of the average value of theinput voltage of the power supply 100 determined from the input voltagesense signal U_(INSENSE) 130. In some embodiments, the current source208 may be a voltage controller current source or a current controllercurrent source.

The controller 124 also receives input signal 122. However, as mentionedabove the input signal 122 may be modified by the offset current I_(OS).The input signal 122 at node A (modified by the offset current I_(OS),however the offset current I_(OS) may be substantially equal to zero) isreceived by the amplifier 202 along with the reference voltage V_(REF)204. The amplifier 202 then outputs a value proportional to thedifference between the input signal 122 at node A and the referencevoltage V_(REF) 204. In another embodiment, a comparator may replaceamplifier 202 and outputs a logic high value or a logic low valuedepending on whether the input signal 122 at node A was greater orlesser than the reference voltage V_(REF) 204. The output of theamplifier 202 is utilized by the logic block 210 to control the switchS1 110 and regulate the output voltage V_(O) 116 of the power supply100. In other words, the controller 124 regulates the output voltageV_(O) 116 such that the output of the amplifier 202 is substantiallyzero, indicating that the input signal 122 at node A is substantiallyequal to the reference voltage V_(REF) 204.

However, the controller 124 may adjust the value which the outputvoltage V_(O) 116 is regulated to depending on the input voltage sensesignal U_(INSENSE) 130. As mentioned above, some benefits may be gainedby utilizing a boost converter whose output voltage varies with theinput voltage. The controller 124 adjusts the desired value which V_(O)116 is regulated to by adjusting the offset current I_(OS) based on thesensed value of the input voltage provided by the input voltage sensesignal U_(INSENSE) 130. For example, the voltage at node A 119 or inother words sensed output voltage V_(OSENSE) 121:

$\begin{matrix}{V_{OSENSE} = {{V_{O}\frac{R\; 2}{{R\; 1} + {R\; 2}}} + {I_{OS}\frac{R\; 2\; R\; 1}{{R\; 1} + {R\; 2}}}}} & (1)\end{matrix}$

However, in general R1 is much greater than R2 and equation (1) can beapproximated as:

$\begin{matrix}{V_{OSENSE} \approx {{V_{O}\frac{R\; 2}{R\; 1}} + {I_{OS}R\; 2}}} & (2)\end{matrix}$

The ratio between R1 118 and R2 120 determines how much the outputvoltage V_(O) 116 is divided by. For example, if the ratio between R1118 and R2 120 was 50 (R1 118 is 50 times greater than R2 120), then theoutput voltage V_(O) 116 would be 50 times greater than the portion ofthe sensed output voltage V_(OSENSE) 121 due to the output voltage V_(O)116. Or in other words, the output voltage V_(O) 116 is 50 times greaterthan the sensed output voltage V_(OSENSE) 121 of the input signal 122prior to modification by the offset current I_(OS). The input signal 122may also be modified by the offset current I_(OS). As shown in bothequations (1) and (2), the sensed output voltage V_(OSENSE) 121 is alsopartially determined by the offset current I_(OS) and resistor R2 120.Utilizing the offset current I_(OS), the controller 124 may vary thedesired value which to regulate the output voltage V_(O) 116 dependingon the value of the input voltage provided by the input voltage sensesignal U_(INSENSE) 130. As mentioned above, the controller 124 regulatesthe power supply 100 such that the voltage at node A (also known assensed output voltage V_(OSENSE) 121) is substantially equal to thereference voltage V_(REF) 204. When an offset current I_(OS) increases,the controller 124 would regulate the power supply such that the outputvoltage V_(O) 116 decreases until the sensed output voltage V_(OSENSE)121 at node A is substantially equal to the reference voltage V_(REF)204. From equation (2), the output voltage V_(O) 116 is given by:

$\begin{matrix}{V_{O} \approx {\frac{R\; 1}{R\; 2}\left( {V_{OSENSE} - {I_{OS}R\; 2}} \right)}} & (3)\end{matrix}$

As mentioned above, the controller 124 regulates the power supply 100such that the sensed output voltage V_(OSENSE) 121 is substantiallyequal to the reference voltage V_(REF) 204. By substituting thereference voltage V_(REF) 204 for the sensed output voltage V_(OSENSE)121, equation (3) may be rewritten as:

$\begin{matrix}{V_{O} \approx {\frac{R\; 1}{R\; 2}\left( {V_{REF} - {I_{OS}R\; 2}} \right)}} & (4)\end{matrix}$

As shown with equations (3) and (4), an increase in the offset currentI_(OS) results in a decrease in the output voltage V_(O) 116. Since theoffset current I_(OS) is determined by the input voltage from the inputvoltage sense signal (as illustrated in FIGS. 3A, 3C and 3D), the outputvoltage V_(O) 116 of power supply 100 varies with the input voltage. Inaddition, the values of R1 118 and R2 120 set the maximum output voltageV_(O) 116 while the value of R2 120 sets the ratio between the inputvoltage and the output voltage V_(O) 116. In one embodiment, the inputvoltage is the peak rectified voltage V_(RECT) 106. In anotherembodiment, the input voltage is the average rectified voltage V_(RECT)106. By utilizing the offset current, controller 124 may utilize asingle terminal to receive feedback and to set the step-up ratio of thecontroller.

Referring to FIG. 3A, a graph of the offset current I_(OS) relationshipof the controller 124 is illustrated including input voltage sensesignal U_(INSENSE) 130, offset current I_(OS), a first input thresholdU_(TH1) 302, and a second input threshold U_(TH2) 304.

When the value of the input voltage provided by the input voltage sensesignal U_(INSENSE) 130 is low, the offset current I_(OS) issubstantially a non-zero value. The offset current I_(OS) issubstantially a constant non-zero value until the value of the inputvoltage reaches the first input threshold U_(TH1) 302. Once the value ofthe input voltage reaches the first input threshold U_(TH1) 302, theoffset current I_(OS) begins to decrease. The offset current I_(OS)decreases until the value of the input voltage reaches the second inputthreshold U_(TH2) 304. When the value of the input voltage is greaterthan the second input threshold U_(TH2) 304, the offset current I_(OS)is substantially zero. In this example, the first input thresholdU_(TH1) 302 corresponds to a lower value of input voltage than thesecond input threshold U_(TH2) 304.

In other words, when the value of the input voltage is between the firstinput threshold U_(TH1) 302 and the second input threshold U_(TH2) 304the offset current I_(OS) decreases as the value of the input voltageincreases. In the example shown in FIG. 3A, the offset current I_(OS)decreases substantially linearly with an increasing value of the inputvoltage. The offset current I_(OS) is substantially zero when the valueof the input voltage is greater than the second input threshold U_(TH2)304. The offset current I_(OS) is at a substantially non-zero value whenthe value of the input voltage is less than the first input thresholdU_(TH1) 302.

Referring next to FIG. 3B, a graph illustrating an example outputvoltage to input voltage relationship of the power supply is illustratedincluding output voltage V_(O) 116, input voltage sense signalU_(INSENSE) 130. a first input threshold U_(TH1) 302, a second inputthreshold U_(TH2) 304, a first output voltage level V_(OUT1) 303, and asecond output voltage level V_(OUT2) 305. The graph of FIG. 3Billustrates the output voltage V_(O) 116 when the offset current I_(OS)relationship of FIG. 3A is utilized.

When the value of the value input voltage provided by the input voltagesense signal U_(INSENSE) 130 is low, the offset current I_(OS) issubstantially a constant non-zero value until the value of the inputvoltage reaches the first input threshold U_(TH1) 302. While the valueof the input voltage is less than the first input threshold U_(TH1) 302,the output voltage V_(O) 116 is also a substantially constant non-zerovalue of first output voltage level V_(OUT1) 303. Once the value of theinput voltage reaches the first input threshold U_(TH1) 302, the offsetcurrent I_(OS) begins to decrease until the value of the input voltagereaches the second input threshold U_(TH2) 304. The output voltage V_(O)116 increases as the offset current I_(OS) decreases when the inputvoltage is between the first input threshold U_(TH1) 302 and the secondinput threshold U_(TH2) 304. When the input voltage is greater than thesecond input threshold U_(TH2) 304, the offset current I_(OS) issubstantially zero and the output voltage V_(O) 116 is a substantiallyconstant non-zero value of second output voltage level V_(OUT2) 305. Inone embodiment of the present invention, the first output voltage levelV_(OUT1) 303 corresponds to a lower value of the output voltage V_(O)116 than the second output voltage level V_(OUT2) 305.

As discussed above, the relationship between the offset current I_(OS)and the output voltage V_(O) 116 is shown in equations (1), (2), (3) and(4). As shown in FIGS. 3A and 3B, as the offset I_(OS) current decreasesthe output voltage V_(O) 116 increases. As the offset current I_(OS)increases the output voltage V_(O) 116 will subsequently decrease. Inthe example shown in FIGS. 3A and 3B, the offset current I_(OS)decreases substantially linearly and the output voltage V_(O) 116increases substantially linearly with an increasing value of the inputvoltage between the first input threshold U_(TH1) 302 and the secondinput threshold U_(TH2) 304.

Referring next to FIG. 3C, a graph of another example of the offsetcurrent I_(OS) relationship of the controller 124 is illustratedincluding input voltage sense signal U_(INSENSE) 130, offset currentI_(OS), a first input threshold U_(TH1) 302, and a second inputthreshold U_(TH2) 304. The graph of FIG. 3C illustrates the offsetcurrent I_(OS) relationship with added hysteresis.

When the value of the input voltage provided by the input voltage sensesignal U_(INSENSE) 130 is less than the first input threshold U_(TH1)302, the offset current I_(OS) is substantially a constant non-zerovalue. The offset current I_(OS) is substantially zero when the value ofthe input voltage is greater than the second input threshold U_(TH2)304. For the offset current I_(OS) to decrease from the substantiallynon-zero value to substantially zero, the value of the input voltage isgreater than or substantially equal to the second input thresholdU_(TH2) 304. However for the offset current I_(OS) to increase from thesubstantially zero value to substantially non-zero, the value of theinput voltage is less than or substantially equal to the first thresholdinput U_(TH1) 302. In the example of FIG. 3C, the first input thresholdU_(TH1) 302 corresponds to a lower value of input voltage than thesecond input threshold U_(TH2) 304. By adding hysteresis to therelationship between the offset current I_(OS) and the value of theinput voltage, power supply 100 accounts for fluctuations in the inputvoltage due to other factors such as noise.

FIG. 3D is a graph of a further example offset current I_(OS)relationship of the controller 124 is illustrated including inputvoltage sense signal U_(INSENSE) 130, offset current I_(OS), inputthresholds U_(TH1) 302 to U_(TH2(N-1)) 312, and offset current levels I₁314 to I_(N) 322. FIG. 3D illustrates the offset current I_(OS)relationship with hysteresis and multiple offset current levels.

As discussed above, FIG. 3C illustrated the offset current I_(OS)relationship with added hysteresis for two offset current levels of aconstant non-zero value and a substantially zero value. FIG. 3D furtherillustrates the offset current I_(OS) relationship with added hysteresisfor N offset current levels I₁ 314, I₂ 316 to I_(N-2) 318, I_(N-1) 320,and I_(N) 322. In the example shown in FIG. 3D, the current level I₁ 314is substantially zero while current levels I₂ 316 to I_(N-2) 318,I_(N-1) 320, and I_(N) 322 are substantially non-zero values where thenext current level is greater than the previous current level. Or inother words, the value of current level I_(N) 322 is greater than thevalue of current level I_(N-1) 320 which is greater than the value ofcurrent level I_(N-2) 318 and so on until the substantially zero valueof current level I₁ 314. For N offset current levels, there are 2(N−1)input thresholds. These input thresholds are shown in FIG. 3D as U_(TH1)302, U_(TH2) 304, U_(TH3) 306, U_(TH4) 308, U_(TH2(N-1)-1) 310 andU_(TH2(N-1)) 312. Input thresholds U_(TH1) 302, U_(TH2) 304, U_(TH3)306, U_(TH4) 308, U_(TH2(N-1)-1) 310 and U_(TH2(N-1)) 312 aresubstantially non-zero values with the next input threshold beinggreater than the previous input threshold. Or in other words, inputthreshold U_(TH2(N-1)) 312 is greater than input thresholdU_(TH2(N-1)-1) 310 and so on until the first input threshold U_(TH1)302.

When the value of the input voltage provided by the input voltage sensesignal U_(INSENSE) 130 is less than the first input threshold U_(TH1)302, the offset current I_(OS) is substantially a constant non-zerovalue of current level I_(N) 322. The offset current I_(OS) issubstantially a constant non-zero value of current level I_(N-1) 320when the value of the input voltage is greater than the second inputthreshold U_(TH2) 304 and less than the third input voltage vale U_(TH3)306. For the offset current I_(OS) to decrease from the substantiallynon-zero value of current level I_(N) 322 to the substantially constantnon-zero value of current level I_(N-1) 320, the value of the inputvoltage is greater than or substantially equal to the second inputthreshold U_(TH2) 304. However for the offset current I_(OS) to increasefrom the substantially constant non-zero value of current level I_(N-1)320 to the substantially non-zero value of current level I_(N) 322, thevalue of the input voltage is less than or substantially equal to thefirst threshold input U_(TH1) 302. The pattern for the transitions fromone offset current level to another repeats until the transition betweenthe non-zero value of current level I₂ 316 and the substantially zerovalue of current level I₁ 314. When the value of the input voltageprovided by the input voltage sense signal U_(INSENSE) 130 is greaterthan input threshold U_(TH2(N-1)) 312, the offset current I_(OS) issubstantially zero at current level I₁ 314.

While the invention herein disclosed has been described by means ofspecific embodiments, examples and applications thereof, numerousmodifications and variations could be made thereto by those skilled inthe art without departing from the scope of the invention set forth inthe claims.

1. A controller for a power supply, the controller comprising: a drivesignal generator to be coupled to provide a drive signal to controlswitching of a switch included in the power supply to regulate an outputvoltage of the power supply in response to a sensed output voltage suchthat the output voltage of the power supply is greater than an inputvoltage of the power supply; and a compensation circuit coupled to thedrive signal generator and coupled to output an offset current havingone of a plurality of constant non-zero values, each of the plurality ofconstant non-zero values corresponding with the input voltage of thepower supply reaching a respective input threshold, wherein theplurality of constant non-zero values decrease as the respective inputthresholds increase.
 2. The controller of claim 1, wherein thecompensation circuit includes an added hysteresis, such that the offsetcurrent transitions from a first constant non-zero value to a secondconstant non-zero value when the input voltage increases to a firstinput threshold and the offset current transitions from the secondconstant non-zero value back to the first constant non-zero value whenthe input voltage decreases to a second input threshold, wherein thefirst input threshold is greater than the second input threshold.
 3. Thecontroller of claim 1, wherein the compensation circuit sets a value ofthe offset current to substantially zero when the input voltage isgreater than or equal to an upper input threshold.
 4. The controller ofclaim 1, wherein the switch and the controller are integrated into asingle monolithic integrated device.
 5. A power supply, comprising: afeedback circuit coupled to provide a sensed output voltagerepresentative of an output voltage of the power supply; a controllercoupled to the feedback circuit, the controller including: a drivesignal generator coupled to control switching of a switch included inthe power supply to regulate the output voltage of the power supply inresponse to the sensed output voltage such that the output voltage ofthe power supply is greater than an input voltage of the power supply;and a compensation circuit coupled to the drive signal generator andcoupled to output an offset current having one of a plurality ofconstant non-zero values, each of the plurality of constant non-zerovalues corresponding with the input voltage of the power supply reachinga respective input threshold, wherein the plurality of constant non-zerovalues decrease as the respective input thresholds increase.
 6. Thepower supply of claim 5, wherein the feedback circuit further includes:a node external to the controller and coupled to the compensationcircuit and coupled to the drive signal generator; a first resistancecoupled to the node; and a second resistance coupled to the node,wherein the sensed output voltage is a voltage at the node with respectto an input return of the power supply.
 7. The power supply of claim 5,wherein the compensation circuit includes an added hysteresis, such thatthe offset current transitions from a first constant non-zero value to asecond constant non-zero value when the input voltage increases to afirst input threshold and the offset current transitions from the secondconstant non-zero value back to the first constant non-zero value whenthe input voltage decreases to a second input threshold, wherein thefirst input threshold is greater than the second input threshold.
 8. Thepower supply of claim 5, wherein the compensation circuit sets a valueof the offset current to substantially zero when the input voltage isgreater than or equal to an upper input threshold.
 9. The power supplyof claim 5, wherein the switch and the controller are integrated into asingle monolithic integrated device.